Description
A side effect of an integrated chipset option may be able to be used by an attacker to bypass SPI ROM protections, allowing unauthorized SPI ROM modification.
Affected products
| Vendor | Product | Affected | Fixed |
|---|---|---|---|
| AMD | 1st Gen AMD EPYC™ | unspecified – < NaplesPI-SP3_1.0.0.G | NaplesPI-SP3_1.0.0.G |
| AMD | 2nd Gen AMD EPYC™ | unspecified – < RomePI-SP3_1.0.0.C | RomePI-SP3_1.0.0.C |
| AMD | 3rd Gen AMD EPYC™ | unspecified – < MilanPI-SP3_1.0.0.4 | MilanPI-SP3_1.0.0.4 |