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Unscored CVE-2021-1104 EUVD-2021-6571GHSA-5pxp-m22f-2m9x

The RISC-V Instruction Set Manual contains a documented ambiguity for the Machine Trap Vector Base Address (MTVEC) register that may lead t…

Published Aug 13, 2021 · Updated Aug 3, 2024 · Assigned by nvidia

Description

The RISC-V Instruction Set Manual contains a documented ambiguity for the Machine Trap Vector Base Address (MTVEC) register that may lead to a vulnerability due to the initial state of the register not being defined, potentially leading to information disclosure, data tampering and denial of service.

Affected products

VendorProductAffectedFixed
RISCV.org Machine Trap Base Address (MTVEC) Register All versions —

References