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High · 7.0 Public exploit CVE-2024-30212 EUVD-2024-28143

Microchip Harmony 3 Core library allows read and write access to RAM via a SCSI READ or WRITE command

Published May 28, 2024 · Updated Feb 13, 2025 · Assigned by Microchip

Vendor: Microchip Product: MPLAB® Harmony 3 Core Module

Description

If a SCSI READ(10) command is initiated via USB using the largest LBA
(0xFFFFFFFF) with it's default block size of 512 and a count of 1,

the first 512 byte of the 0x80000000 memory area is returned to the
user. If the block count is increased, the full RAM can be exposed.

The same method works to write to this memory area. If RAM contains
pointers, those can be - depending on the application - overwritten to

return data from any other offset including Progam and Boot Flash.

Affected products

VendorProductAffectedFixed
Microchip MPLAB® Harmony 3 Core Module 3.0.0 – < 3.13.4 3.13.4

Public exploits

Exploit or proof-of-concept code for this vulnerability is publicly available, which lowers the bar for attackers. Treat it as a reason to patch sooner.

Third-party code, not reviewed by us. Public PoCs are sometimes fake or contain malware. Read the code first and run it only in an isolated lab, against systems you are authorised to test.

GitHub 1 repository

Sources: PoC-in-GitHub, Metasploit Framework, Exploit-DB — updated daily. Only links are listed; no exploit code is hosted here.

References