Summary
[20240910-1.0.1]
- switch upstream to 9 Stream sources for simplicity
- don't bother calling dracut if virtualized [Orabug: 35710094]
- ensure UEK also rebuilds initramfs [Orabug: 34280058]
- add support for UEK7 kernels
- enable early update for 06-4f-01
- remove no longer appropriate caveats for 06-2d-07 and 06-55-04
- enable early and late load on RHCK
[4:20240910-1]
- Update Intel CPU microcode to microcode-20240910 release, addresses
- Addresses CVE-2024-23984, CVE-2024-24853, CVE-2024-24968, CVE-2024-24980,
CVE-2024-25939 (RHEL-58057):
- Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xb6 up to 0xb8;
- Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xf4 up
to 0xf6;
- Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xf4 up
to 0xf6;
- Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xf4 up
to 0xf6;
- Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xf4 up
to 0xf6;
- Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
revision 0xfa up to 0xfc;
- Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xf6 up
to 0xf8;
- Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xf4 up
to 0xf6;
- Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xf6 up
to 0xf8;
- Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xfc up
to 0x100;
- Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
0x5003605 up to 0x5003707;
- Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002802
up to 0x7002904;
- Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0003d1
up to 0xd0003e7;
- Update of 06-6c-01/0x10 (ICL-D B0) microcode from revision 0x1000290
up to 0x10002b0;
- Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xc4
up to 0xc6;
- Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x36 up
to 0x38;
- Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x50 up
to 0x52;
- Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x19 up
to 0x1a;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision
0x35 up to 0x36;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-97-02) from revision 0x35 up to 0x36;
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x35 up to 0x36;
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x35 up to 0x36;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-97-05) from revision 0x35 up to 0x36;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x35
up to 0x36;
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x35 up to 0x36;
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x35 up to 0x36;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
0x433 up to 0x434;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
intel-ucode/06-9a-03) from revision 0x433 up to 0x434;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
intel-ucode/06-9a-04) from revision 0x433 up to 0x434;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x433
up to 0x434;
- Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xfa up
to 0xfc;
- Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xfa
up to 0xfc;
- Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xfa
up to 0xfc;
- Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xfa
up to 0xfe;
- Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
0xfa up to 0xfc;
- Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x5e up
to 0x62;
- Update of 06-aa-04/0xe6 (MTL-H/U C0) microcode from revision 0x1c
up to 0x1f;
- Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x123 up
to 0x129;
- Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision
0x4121 up to 0x4122;
- Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
intel-ucode/06-ba-02) from revision 0x4121 up to 0x4122;
- Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-02) from
revision 0x4121 up to 0x4122;
- Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
intel-ucode/06-ba-03) from revision 0x4121 up to 0x4122;
- Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4121
up to 0x4122;
- Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-03) from
revision 0x4121 up to 0x4122;
- Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
intel-ucode/06-ba-08) from revision 0x4121 up to 0x4122;
- Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
intel-ucode/06-ba-08) from revision 0x4121 up to 0x4122;
- Update of 06-ba-08/0xe0 microcode from revision 0x4121 up to 0x4122;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-02) from revision 0x35 up to 0x36;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-02) from revision 0x35 up to 0x36;
- Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x35 up
to 0x36;
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)
from revision 0x35 up to 0x36;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-05) from revision 0x35 up to 0x36;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microc
Fixed packages 1
| Release | Package | Fixed in |
|---|---|---|
| Oracle Linux · 9 | microcode_ctl | 4:20240910-1.0.1.el9_5 |
Vulnerabilities 7
-
Medium 6.5
Information exposure through microarchitectural state after transient execution from some register files for some Intel…
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Medium 6.5
Protection mechanism failure of bus lock regulator for some Intel(R) Processors may allow an unauthenticated user to po…
-
Medium 6.1
Protection mechanism failure in some 3rd and 4th Generation Intel(R) Xeon(R) Processors when using Intel(R) SGX or Inte…
-
Medium 5.5
Non-transparent sharing of return predictor targets between contexts in some Intel(R) Processors may allow an authorize…
-
Medium 5.3
Incorrect calculation in microcode keying mechanism for some Intel(R) Xeon(R) D Processors with Intel(R) SGX may allow …
-
Medium 4.7
Sequence of processor instructions leads to unexpected behavior in Intel(R) Core(TM) Ultra Processors may allow an auth…
-
Low 2.8
Hardware logic contains race conditions in some Intel(R) Processors may allow an authenticated user to potentially enab…