Summary
Sander Wiebing and Cristiano Giuffrida discovered that some Intel®
Processors did not properly handle data in Shared Microarchitectural
Structures during Transient Execution. An authenticated attacker could
possibly use this issue to obtain sensitive information. (CVE-2024-28956)
It was discovered that some Intel® Processors did not properly handle
prediction calculations. An authenticated attacker could possibly use this
issue to obtain sensitive information. (CVE-2024-43420, CVE-2024-45332,
CVE-2025-20623)
It was discovered that some Intel® Processors did not properly initialize
resources in the branch prediction unit. An authenticated attacker could
possibly use this issue to obtain sensitive information. (CVE-2025-20012,
CVE-2025-24495)
Michal Raviv and Jeff Gilbert discovered that some Intel® Processors did
not properly handle resources and exceptions in the core management
mechanism. An authenticated attacker could possibly use this issue to
cause a denial of service. (CVE-2025-20054, CVE-2025-20103)
Fixed packages 5
| Release | Package | Fixed in |
|---|---|---|
| Ubuntu · 20.04 LTS 20.04:LTS | intel-microcode | 3.20250512.0ubuntu0.20.04.1 |
| Ubuntu · 22.04 LTS 22.04:LTS | intel-microcode | 3.20250512.0ubuntu0.22.04.1 |
| Ubuntu · 24.04 LTS 24.04:LTS | intel-microcode | 3.20250512.0ubuntu0.24.04.1 |
| Ubuntu · Pro 16.04 LTS Pro:16.04:LTS | intel-microcode | 3.20250512.0ubuntu0.16.04.1+esm1 |
| Ubuntu · Pro 18.04 LTS Pro:18.04:LTS | intel-microcode | 3.20250512.0ubuntu0.18.04.1+esm1 |
Vulnerabilities 8
-
Medium 6.5
Uncaught exception in the core management mechanism for some Intel(R) Processors may allow an authenticated user to pot…
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Medium 6.5
Insufficient resource pool in the core management mechanism for some Intel(R) Processors may allow an authenticated use…
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Medium 5.6
Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some Intel(R) …
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Medium 5.6
Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient executi…
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Medium 5.6
Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient executi…
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Medium 5.6
Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient executi…
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Medium 5.6
Incorrect initialization of resource in the branch prediction unit for some Intel(R) Core™ Ultra Processors may allow a…
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Medium 4.9
Incorrect behavior order for some Intel(R) Core™ Ultra Processors may allow an unauthenticated user to potentially enab…
References
-
report
https://ubuntu.com/security/CVE-2024-28956
-
report
https://ubuntu.com/security/CVE-2024-43420
-
report
https://ubuntu.com/security/CVE-2024-45332
-
report
https://ubuntu.com/security/CVE-2025-20012
-
report
https://ubuntu.com/security/CVE-2025-20054
-
report
https://ubuntu.com/security/CVE-2025-20103
-
report
https://ubuntu.com/security/CVE-2025-20623
-
report
https://ubuntu.com/security/CVE-2025-24495